
strsep:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005b8 <_init>:
  4005b8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005bc:	910003fd 	mov	x29, sp
  4005c0:	94000042 	bl	4006c8 <call_weak_fn>
  4005c4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005c8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004005d0 <.plt>:
  4005d0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4005d4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf2d0>
  4005d8:	f947fe11 	ldr	x17, [x16, #4088]
  4005dc:	913fe210 	add	x16, x16, #0xff8
  4005e0:	d61f0220 	br	x17
  4005e4:	d503201f 	nop
  4005e8:	d503201f 	nop
  4005ec:	d503201f 	nop

00000000004005f0 <memcpy@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005f4:	f9400211 	ldr	x17, [x16]
  4005f8:	91000210 	add	x16, x16, #0x0
  4005fc:	d61f0220 	br	x17

0000000000400600 <strlen@plt>:
  400600:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400604:	f9400611 	ldr	x17, [x16, #8]
  400608:	91002210 	add	x16, x16, #0x8
  40060c:	d61f0220 	br	x17

0000000000400610 <__libc_start_main@plt>:
  400610:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400614:	f9400a11 	ldr	x17, [x16, #16]
  400618:	91004210 	add	x16, x16, #0x10
  40061c:	d61f0220 	br	x17

0000000000400620 <__gmon_start__@plt>:
  400620:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400624:	f9400e11 	ldr	x17, [x16, #24]
  400628:	91006210 	add	x16, x16, #0x18
  40062c:	d61f0220 	br	x17

0000000000400630 <abort@plt>:
  400630:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400634:	f9401211 	ldr	x17, [x16, #32]
  400638:	91008210 	add	x16, x16, #0x20
  40063c:	d61f0220 	br	x17

0000000000400640 <puts@plt>:
  400640:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400644:	f9401611 	ldr	x17, [x16, #40]
  400648:	9100a210 	add	x16, x16, #0x28
  40064c:	d61f0220 	br	x17

0000000000400650 <strsep@plt>:
  400650:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400654:	f9401a11 	ldr	x17, [x16, #48]
  400658:	9100c210 	add	x16, x16, #0x30
  40065c:	d61f0220 	br	x17

0000000000400660 <strncpy@plt>:
  400660:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400664:	f9401e11 	ldr	x17, [x16, #56]
  400668:	9100e210 	add	x16, x16, #0x38
  40066c:	d61f0220 	br	x17

0000000000400670 <printf@plt>:
  400670:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400674:	f9402211 	ldr	x17, [x16, #64]
  400678:	91010210 	add	x16, x16, #0x40
  40067c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400680 <_start>:
  400680:	d280001d 	mov	x29, #0x0                   	// #0
  400684:	d280001e 	mov	x30, #0x0                   	// #0
  400688:	aa0003e5 	mov	x5, x0
  40068c:	f94003e1 	ldr	x1, [sp]
  400690:	910023e2 	add	x2, sp, #0x8
  400694:	910003e6 	mov	x6, sp
  400698:	580000c0 	ldr	x0, 4006b0 <_start+0x30>
  40069c:	580000e3 	ldr	x3, 4006b8 <_start+0x38>
  4006a0:	58000104 	ldr	x4, 4006c0 <_start+0x40>
  4006a4:	97ffffdb 	bl	400610 <__libc_start_main@plt>
  4006a8:	97ffffe2 	bl	400630 <abort@plt>
  4006ac:	00000000 	.inst	0x00000000 ; undefined
  4006b0:	00400b10 	.word	0x00400b10
  4006b4:	00000000 	.word	0x00000000
  4006b8:	00400b28 	.word	0x00400b28
  4006bc:	00000000 	.word	0x00000000
  4006c0:	00400ba8 	.word	0x00400ba8
  4006c4:	00000000 	.word	0x00000000

00000000004006c8 <call_weak_fn>:
  4006c8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf2d0>
  4006cc:	f947f000 	ldr	x0, [x0, #4064]
  4006d0:	b4000040 	cbz	x0, 4006d8 <call_weak_fn+0x10>
  4006d4:	17ffffd3 	b	400620 <__gmon_start__@plt>
  4006d8:	d65f03c0 	ret
  4006dc:	00000000 	.inst	0x00000000 ; undefined

00000000004006e0 <deregister_tm_clones>:
  4006e0:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4006e4:	91016000 	add	x0, x0, #0x58
  4006e8:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  4006ec:	91016021 	add	x1, x1, #0x58
  4006f0:	eb00003f 	cmp	x1, x0
  4006f4:	540000a0 	b.eq	400708 <deregister_tm_clones+0x28>  // b.none
  4006f8:	90000001 	adrp	x1, 400000 <_init-0x5b8>
  4006fc:	f945e421 	ldr	x1, [x1, #3016]
  400700:	b4000041 	cbz	x1, 400708 <deregister_tm_clones+0x28>
  400704:	d61f0020 	br	x1
  400708:	d65f03c0 	ret
  40070c:	d503201f 	nop

0000000000400710 <register_tm_clones>:
  400710:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400714:	91016000 	add	x0, x0, #0x58
  400718:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  40071c:	91016021 	add	x1, x1, #0x58
  400720:	cb000021 	sub	x1, x1, x0
  400724:	9343fc21 	asr	x1, x1, #3
  400728:	8b41fc21 	add	x1, x1, x1, lsr #63
  40072c:	9341fc21 	asr	x1, x1, #1
  400730:	b40000a1 	cbz	x1, 400744 <register_tm_clones+0x34>
  400734:	90000002 	adrp	x2, 400000 <_init-0x5b8>
  400738:	f945e842 	ldr	x2, [x2, #3024]
  40073c:	b4000042 	cbz	x2, 400744 <register_tm_clones+0x34>
  400740:	d61f0040 	br	x2
  400744:	d65f03c0 	ret

0000000000400748 <__do_global_dtors_aux>:
  400748:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40074c:	910003fd 	mov	x29, sp
  400750:	f9000bf3 	str	x19, [sp, #16]
  400754:	b0000093 	adrp	x19, 411000 <memcpy@GLIBC_2.17>
  400758:	39416260 	ldrb	w0, [x19, #88]
  40075c:	35000080 	cbnz	w0, 40076c <__do_global_dtors_aux+0x24>
  400760:	97ffffe0 	bl	4006e0 <deregister_tm_clones>
  400764:	52800020 	mov	w0, #0x1                   	// #1
  400768:	39016260 	strb	w0, [x19, #88]
  40076c:	f9400bf3 	ldr	x19, [sp, #16]
  400770:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400774:	d65f03c0 	ret

0000000000400778 <frame_dummy>:
  400778:	17ffffe6 	b	400710 <register_tm_clones>

000000000040077c <strsep1>:
  40077c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400780:	910003fd 	mov	x29, sp
  400784:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400788:	912fc001 	add	x1, x0, #0xbf0
  40078c:	910063a0 	add	x0, x29, #0x18
  400790:	a9400c22 	ldp	x2, x3, [x1]
  400794:	a9000c02 	stp	x2, x3, [x0]
  400798:	f9400822 	ldr	x2, [x1, #16]
  40079c:	f9000802 	str	x2, [x0, #16]
  4007a0:	b9401821 	ldr	w1, [x1, #24]
  4007a4:	b9001801 	str	w1, [x0, #24]
  4007a8:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4007ac:	912f6000 	add	x0, x0, #0xbd8
  4007b0:	f9001fa0 	str	x0, [x29, #56]
  4007b4:	910063a0 	add	x0, x29, #0x18
  4007b8:	f9000ba0 	str	x0, [x29, #16]
  4007bc:	910043a0 	add	x0, x29, #0x10
  4007c0:	f9401fa1 	ldr	x1, [x29, #56]
  4007c4:	97ffffa3 	bl	400650 <strsep@plt>
  4007c8:	aa0003e1 	mov	x1, x0
  4007cc:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4007d0:	912f8000 	add	x0, x0, #0xbe0
  4007d4:	97ffffa7 	bl	400670 <printf@plt>
  4007d8:	f9400ba1 	ldr	x1, [x29, #16]
  4007dc:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4007e0:	912f8000 	add	x0, x0, #0xbe0
  4007e4:	97ffffa3 	bl	400670 <printf@plt>
  4007e8:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4007ec:	912fa000 	add	x0, x0, #0xbe8
  4007f0:	f9001fa0 	str	x0, [x29, #56]
  4007f4:	910043a0 	add	x0, x29, #0x10
  4007f8:	f9401fa1 	ldr	x1, [x29, #56]
  4007fc:	97ffff95 	bl	400650 <strsep@plt>
  400800:	aa0003e1 	mov	x1, x0
  400804:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400808:	912f8000 	add	x0, x0, #0xbe0
  40080c:	97ffff99 	bl	400670 <printf@plt>
  400810:	f9400ba1 	ldr	x1, [x29, #16]
  400814:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400818:	912f8000 	add	x0, x0, #0xbe0
  40081c:	97ffff95 	bl	400670 <printf@plt>
  400820:	52800000 	mov	w0, #0x0                   	// #0
  400824:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400828:	d65f03c0 	ret

000000000040082c <strsep2>:
  40082c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400830:	910003fd 	mov	x29, sp
  400834:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400838:	91306000 	add	x0, x0, #0xc18
  40083c:	910063a2 	add	x2, x29, #0x18
  400840:	aa0003e3 	mov	x3, x0
  400844:	a9400460 	ldp	x0, x1, [x3]
  400848:	a9000440 	stp	x0, x1, [x2]
  40084c:	a9410460 	ldp	x0, x1, [x3, #16]
  400850:	a9010440 	stp	x0, x1, [x2, #16]
  400854:	910063a0 	add	x0, x29, #0x18
  400858:	f9000ba0 	str	x0, [x29, #16]
  40085c:	14000003 	b	400868 <strsep2+0x3c>
  400860:	f9401fa0 	ldr	x0, [x29, #56]
  400864:	97ffff77 	bl	400640 <puts@plt>
  400868:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  40086c:	91304001 	add	x1, x0, #0xc10
  400870:	910043a0 	add	x0, x29, #0x10
  400874:	97ffff77 	bl	400650 <strsep@plt>
  400878:	f9001fa0 	str	x0, [x29, #56]
  40087c:	f9401fa0 	ldr	x0, [x29, #56]
  400880:	f100001f 	cmp	x0, #0x0
  400884:	54fffee1 	b.ne	400860 <strsep2+0x34>  // b.any
  400888:	52800000 	mov	w0, #0x0                   	// #0
  40088c:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400890:	d65f03c0 	ret

0000000000400894 <gga>:
  400894:	a9ae7bfd 	stp	x29, x30, [sp, #-288]!
  400898:	910003fd 	mov	x29, sp
  40089c:	f9000bf3 	str	x19, [sp, #16]
  4008a0:	f90087bf 	str	xzr, [x29, #264]
  4008a4:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4008a8:	91318001 	add	x1, x0, #0xc60
  4008ac:	9101a3a0 	add	x0, x29, #0x68
  4008b0:	aa0103e3 	mov	x3, x1
  4008b4:	d2801361 	mov	x1, #0x9b                  	// #155
  4008b8:	aa0103e2 	mov	x2, x1
  4008bc:	aa0303e1 	mov	x1, x3
  4008c0:	97ffff4c 	bl	4005f0 <memcpy@plt>
  4008c4:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4008c8:	9130e000 	add	x0, x0, #0xc38
  4008cc:	f9008ba0 	str	x0, [x29, #272]
  4008d0:	b9011fbf 	str	wzr, [x29, #284]
  4008d4:	9101a3a0 	add	x0, x29, #0x68
  4008d8:	f90087a0 	str	x0, [x29, #264]
  4008dc:	14000014 	b	40092c <gga+0x98>
  4008e0:	b9811fa0 	ldrsw	x0, [x29, #284]
  4008e4:	d37df000 	lsl	x0, x0, #3
  4008e8:	9100a3a1 	add	x1, x29, #0x28
  4008ec:	f8606833 	ldr	x19, [x1, x0]
  4008f0:	b9811fa0 	ldrsw	x0, [x29, #284]
  4008f4:	d37df000 	lsl	x0, x0, #3
  4008f8:	9100a3a1 	add	x1, x29, #0x28
  4008fc:	f8606820 	ldr	x0, [x1, x0]
  400900:	97ffff40 	bl	400600 <strlen@plt>
  400904:	aa0003e1 	mov	x1, x0
  400908:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  40090c:	91310000 	add	x0, x0, #0xc40
  400910:	aa0103e3 	mov	x3, x1
  400914:	aa1303e2 	mov	x2, x19
  400918:	b9411fa1 	ldr	w1, [x29, #284]
  40091c:	97ffff55 	bl	400670 <printf@plt>
  400920:	b9411fa0 	ldr	w0, [x29, #284]
  400924:	11000400 	add	w0, w0, #0x1
  400928:	b9011fa0 	str	w0, [x29, #284]
  40092c:	910423a0 	add	x0, x29, #0x108
  400930:	f9408ba1 	ldr	x1, [x29, #272]
  400934:	97ffff47 	bl	400650 <strsep@plt>
  400938:	aa0003e2 	mov	x2, x0
  40093c:	b9811fa0 	ldrsw	x0, [x29, #284]
  400940:	d37df000 	lsl	x0, x0, #3
  400944:	9100a3a1 	add	x1, x29, #0x28
  400948:	f8206822 	str	x2, [x1, x0]
  40094c:	b9811fa0 	ldrsw	x0, [x29, #284]
  400950:	d37df000 	lsl	x0, x0, #3
  400954:	9100a3a1 	add	x1, x29, #0x28
  400958:	f8606820 	ldr	x0, [x1, x0]
  40095c:	f100001f 	cmp	x0, #0x0
  400960:	54fffc01 	b.ne	4008e0 <gga+0x4c>  // b.any
  400964:	d503201f 	nop
  400968:	f9400bf3 	ldr	x19, [sp, #16]
  40096c:	a8d27bfd 	ldp	x29, x30, [sp], #288
  400970:	d65f03c0 	ret

0000000000400974 <fetch_gga>:
  400974:	a9b77bfd 	stp	x29, x30, [sp, #-144]!
  400978:	910003fd 	mov	x29, sp
  40097c:	f9000bf3 	str	x19, [sp, #16]
  400980:	f90017a0 	str	x0, [x29, #40]
  400984:	f90013a1 	str	x1, [x29, #32]
  400988:	f9003bbf 	str	xzr, [x29, #112]
  40098c:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400990:	9130e000 	add	x0, x0, #0xc38
  400994:	f90043a0 	str	x0, [x29, #128]
  400998:	b9008fbf 	str	wzr, [x29, #140]
  40099c:	b9007fbf 	str	wzr, [x29, #124]
  4009a0:	f94017a0 	ldr	x0, [x29, #40]
  4009a4:	f9003ba0 	str	x0, [x29, #112]
  4009a8:	14000014 	b	4009f8 <fetch_gga+0x84>
  4009ac:	b9808fa0 	ldrsw	x0, [x29, #140]
  4009b0:	d37df000 	lsl	x0, x0, #3
  4009b4:	9100c3a1 	add	x1, x29, #0x30
  4009b8:	f8606833 	ldr	x19, [x1, x0]
  4009bc:	b9808fa0 	ldrsw	x0, [x29, #140]
  4009c0:	d37df000 	lsl	x0, x0, #3
  4009c4:	9100c3a1 	add	x1, x29, #0x30
  4009c8:	f8606820 	ldr	x0, [x1, x0]
  4009cc:	97ffff0d 	bl	400600 <strlen@plt>
  4009d0:	aa0003e1 	mov	x1, x0
  4009d4:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  4009d8:	91340000 	add	x0, x0, #0xd00
  4009dc:	aa0103e3 	mov	x3, x1
  4009e0:	aa1303e2 	mov	x2, x19
  4009e4:	b9408fa1 	ldr	w1, [x29, #140]
  4009e8:	97ffff22 	bl	400670 <printf@plt>
  4009ec:	b9408fa0 	ldr	w0, [x29, #140]
  4009f0:	11000400 	add	w0, w0, #0x1
  4009f4:	b9008fa0 	str	w0, [x29, #140]
  4009f8:	9101c3a0 	add	x0, x29, #0x70
  4009fc:	f94043a1 	ldr	x1, [x29, #128]
  400a00:	97ffff14 	bl	400650 <strsep@plt>
  400a04:	aa0003e2 	mov	x2, x0
  400a08:	b9808fa0 	ldrsw	x0, [x29, #140]
  400a0c:	d37df000 	lsl	x0, x0, #3
  400a10:	9100c3a1 	add	x1, x29, #0x30
  400a14:	f8206822 	str	x2, [x1, x0]
  400a18:	b9808fa0 	ldrsw	x0, [x29, #140]
  400a1c:	d37df000 	lsl	x0, x0, #3
  400a20:	9100c3a1 	add	x1, x29, #0x30
  400a24:	f8606820 	ldr	x0, [x1, x0]
  400a28:	f100001f 	cmp	x0, #0x0
  400a2c:	54fffc01 	b.ne	4009ac <fetch_gga+0x38>  // b.any
  400a30:	f9402ba0 	ldr	x0, [x29, #80]
  400a34:	97fffef3 	bl	400600 <strlen@plt>
  400a38:	b9007fa0 	str	w0, [x29, #124]
  400a3c:	b9407fa0 	ldr	w0, [x29, #124]
  400a40:	7100401f 	cmp	w0, #0x10
  400a44:	5400012d 	b.le	400a68 <fetch_gga+0xf4>
  400a48:	f9402ba0 	ldr	x0, [x29, #80]
  400a4c:	b9807fa1 	ldrsw	x1, [x29, #124]
  400a50:	aa0103e2 	mov	x2, x1
  400a54:	aa0003e1 	mov	x1, x0
  400a58:	f94013a0 	ldr	x0, [x29, #32]
  400a5c:	97ffff01 	bl	400660 <strncpy@plt>
  400a60:	52800000 	mov	w0, #0x0                   	// #0
  400a64:	14000002 	b	400a6c <fetch_gga+0xf8>
  400a68:	12800000 	mov	w0, #0xffffffff            	// #-1
  400a6c:	f9400bf3 	ldr	x19, [sp, #16]
  400a70:	a8c97bfd 	ldp	x29, x30, [sp], #144
  400a74:	d65f03c0 	ret

0000000000400a78 <test_gga>:
  400a78:	a9ac7bfd 	stp	x29, x30, [sp, #-320]!
  400a7c:	910003fd 	mov	x29, sp
  400a80:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400a84:	91318001 	add	x1, x0, #0xc60
  400a88:	910243a0 	add	x0, x29, #0x90
  400a8c:	aa0103e3 	mov	x3, x1
  400a90:	d2801361 	mov	x1, #0x9b                  	// #155
  400a94:	aa0103e2 	mov	x2, x1
  400a98:	aa0303e1 	mov	x1, x3
  400a9c:	97fffed5 	bl	4005f0 <memcpy@plt>
  400aa0:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400aa4:	9130e000 	add	x0, x0, #0xc38
  400aa8:	f9009fa0 	str	x0, [x29, #312]
  400aac:	a9017fbf 	stp	xzr, xzr, [x29, #16]
  400ab0:	a9027fbf 	stp	xzr, xzr, [x29, #32]
  400ab4:	a9037fbf 	stp	xzr, xzr, [x29, #48]
  400ab8:	a9047fbf 	stp	xzr, xzr, [x29, #64]
  400abc:	a9057fbf 	stp	xzr, xzr, [x29, #80]
  400ac0:	a9067fbf 	stp	xzr, xzr, [x29, #96]
  400ac4:	a9077fbf 	stp	xzr, xzr, [x29, #112]
  400ac8:	a9087fbf 	stp	xzr, xzr, [x29, #128]
  400acc:	910043a0 	add	x0, x29, #0x10
  400ad0:	f9009ba0 	str	x0, [x29, #304]
  400ad4:	910243a0 	add	x0, x29, #0x90
  400ad8:	f9409ba1 	ldr	x1, [x29, #304]
  400adc:	97ffffa6 	bl	400974 <fetch_gga>
  400ae0:	7100001f 	cmp	w0, #0x0
  400ae4:	54000101 	b.ne	400b04 <test_gga+0x8c>  // b.any
  400ae8:	f9409ba0 	ldr	x0, [x29, #304]
  400aec:	97fffec5 	bl	400600 <strlen@plt>
  400af0:	aa0003e1 	mov	x1, x0
  400af4:	90000000 	adrp	x0, 400000 <_init-0x5b8>
  400af8:	91348000 	add	x0, x0, #0xd20
  400afc:	f9409ba2 	ldr	x2, [x29, #304]
  400b00:	97fffedc 	bl	400670 <printf@plt>
  400b04:	d503201f 	nop
  400b08:	a8d47bfd 	ldp	x29, x30, [sp], #320
  400b0c:	d65f03c0 	ret

0000000000400b10 <main>:
  400b10:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400b14:	910003fd 	mov	x29, sp
  400b18:	97ffffd8 	bl	400a78 <test_gga>
  400b1c:	52800000 	mov	w0, #0x0                   	// #0
  400b20:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400b24:	d65f03c0 	ret

0000000000400b28 <__libc_csu_init>:
  400b28:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b2c:	910003fd 	mov	x29, sp
  400b30:	a901d7f4 	stp	x20, x21, [sp, #24]
  400b34:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf2d0>
  400b38:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf2d0>
  400b3c:	91374294 	add	x20, x20, #0xdd0
  400b40:	913722b5 	add	x21, x21, #0xdc8
  400b44:	a902dff6 	stp	x22, x23, [sp, #40]
  400b48:	cb150294 	sub	x20, x20, x21
  400b4c:	f9001ff8 	str	x24, [sp, #56]
  400b50:	2a0003f6 	mov	w22, w0
  400b54:	aa0103f7 	mov	x23, x1
  400b58:	9343fe94 	asr	x20, x20, #3
  400b5c:	aa0203f8 	mov	x24, x2
  400b60:	97fffe96 	bl	4005b8 <_init>
  400b64:	b4000194 	cbz	x20, 400b94 <__libc_csu_init+0x6c>
  400b68:	f9000bb3 	str	x19, [x29, #16]
  400b6c:	d2800013 	mov	x19, #0x0                   	// #0
  400b70:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400b74:	aa1803e2 	mov	x2, x24
  400b78:	aa1703e1 	mov	x1, x23
  400b7c:	2a1603e0 	mov	w0, w22
  400b80:	91000673 	add	x19, x19, #0x1
  400b84:	d63f0060 	blr	x3
  400b88:	eb13029f 	cmp	x20, x19
  400b8c:	54ffff21 	b.ne	400b70 <__libc_csu_init+0x48>  // b.any
  400b90:	f9400bb3 	ldr	x19, [x29, #16]
  400b94:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400b98:	a942dff6 	ldp	x22, x23, [sp, #40]
  400b9c:	f9401ff8 	ldr	x24, [sp, #56]
  400ba0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ba4:	d65f03c0 	ret

0000000000400ba8 <__libc_csu_fini>:
  400ba8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400bac <_fini>:
  400bac:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400bb0:	910003fd 	mov	x29, sp
  400bb4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400bb8:	d65f03c0 	ret
